This application is based upon and claims the benefit of priority from prior Japanese Patent Applications P2000-364613 and P2001-359997 filed on Nov. 30, 2000 and Nov. 26, 2001; the entire contents of which are incorporated by reference herein.
The present invention relates to a semiconductor device of a Chip Scale Package (CSP). Particularly, the present invention relates to a semiconductor device, a surface of which is exposed to the outside.
In recent years, high-speed operation has been required of a semiconductor device. Particularly, in a dynamic random access memory (DRAM), high-speed operation at several 100 MHz level is required. Therefore, a flip chip type semiconductor device has been used such that a surface of a semiconductor chip thereof is exposed to the outside. Further, this type of semiconductor device is required to be downsized and be thin. Therefore, a semiconductor device of a ball grid array (BGA) type has been manufactured. In the semiconductor device of a BGA type, it is possible to package a chip scale. In these semiconductors, a protective resin coats only a portion of the semiconductor chip. In these semiconductors, a surface of a semiconductor chip is exposed to the outside.
However, according to earlier semiconductor devices, there have been cases where a corner portion of the semiconductor chip is damaged and electrical failure occurs in the semiconductor device. It has been supposed that damage is caused by what can be described as the low strength of the semiconductor device.
A semiconductor device according to embodiments of the present invention includes a semiconductor device comprising, a semiconductor chip including a pad disposed on a square first surface, a circuit board including upper surface contacting with the first surface of said semiconductor chip, including a first opening arranged below the pad, and including a wire arranged on a lower surface and electrically connected to the pad, a first resin arranged on the first opening and coating the pad, and a second resin disposed on the upper surface of said circuit board, and including an upper surface at a height substantially equal to a height of a second surface of said semiconductor chip at a point apart from a corner of the square first surface of said semiconductor chip.